Fundamentals of High-Frequency CMOS Analog Integrated by Duran Leblebici

By Duran Leblebici

With a design-centric technique, this textbook bridges the space among basic analog digital circuit textbooks and extra complex RF IC layout texts. the main concerns that has to be taken into consideration while combining analog and electronic circuit development blocks are lined, including the main standards and parameters which are used to explain system-level functionality. basic circuit types permit a powerful realizing of high-frequency layout basics, and SPICE simulations are used to envision effects and fine-tune the layout. With solved layout examples to lead the reader during the choice method that accompanies each one layout job, this is often a fantastic textbook for senior undergraduate and graduate classes in RF CMOS circuits, RF circuit layout, and high-frequency analog circuit layout. Analog built-in circuit designers and RF circuit designers in who need assistance making layout offerings also will locate this a pragmatic and beneficial reference.

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18 lm transistor. 40)   À Á À Á 2 1:21 · 10À10 þ Cgs ¼ 8:2 · 10À3 · 20 · 10À6 · 0:18 · 10À6 3 ð8:2 · 10À3 Þ · ð0:18·10À6 Þ ¼ 29:5 · 10À15 ð0:749Þ ¼ 22:1 · 10À15 F ¼ 22:1 fF An important piece of information obtained from this example is that the overlap capacitance is more than 10% of the total. It means that the overlap capacitance for short channel transistors is not a secondary component of Cgs, and must not be ignored. 1 Derive an expression for the gate–source capacitance of a MOS transistor operating in the velocity saturation region.

B) Typical C–V curve of a PMOS transistor. It is known from MOS theory that the gate-bulk capacitance of a MOS structure exhibits a typical variation. In Fig. 29 the variation of the capacitance of a PMOS transistor as a function of the DC voltage applied between the gate electrode and the bulk is shown. In one extreme case, where the gate voltage is sufficiently more negative than the threshold voltage VT (which is negative for a PMOS transistor), there is a strong inversion layer that forms the lower “plate” of the MOS capacitor.

2 Determination of model parameters and related secondary effects The current–voltage relations given in the previous sections are the most basic current–voltage relations of a MOS transistor. They are simple enough for hand calculations and suitable for understanding the basic behavior of devices and basic circuits containing MOS transistors. To use these expressions for hand calculations, the model parameters in them, namely l, Cox, VT , K (or k) and certainly the gate dimensions (W and L) must be known.

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